Modern integrated circuits are required to operate in very high frequencies while consuming a relatively limited amount of voltage. In order to reduce the power consumption of modern integrated circuits the level of supply voltage has dramatically decreased during the last decade.
This supply voltage reduction has some drawbacks such as an increased sensitivity to voltage drops (also referred to as IR drops or droops) that are proportional to the current (I) consumed by the integrated circuit and to the resistance (R) of the conductors that are connected to the integrated circuit as well as to conductors that are located inside the integrated circuit.
A voltage drop reduces the voltage that is provided to internal components of the integrated circuit and thus can temporarily prevent the integrated circuit from operating in a proper manner.
U.S. Pat. No. 6,058,257 of Nojima, and U.S. patent application publication number 2004/0238850 of Kusumoto, both being incorporated herein by reference, describe apparatuses, devices and methods for designing an integrated circuit such as to reduce internal voltage drops.
U.S. patent application publication number 2004/0030511 of Tien et al., being incorporated herein by reference, describes a method for evaluating (by using simulations) voltage drops.
U.S. patent application 2004/0049752 of Iwanishi et al., being incorporated herein by reference, describes an integrated circuit design process that is responsive to voltage drops.
Japanese patent application JP05021738 titled “A semiconductor integrated circuit”, being incorporated herein by reference, describes an apparatus that increases the supply voltage by a predetermined amount and during a predefined period once a certain event is detected.
U.S. Pat. Nos. 6,044,639 and 6,538,497, being incorporated herein by reference, illustrate various prior art devices and methods for compensating for IR drops.
There is a need to provide a device and method for efficiently compensating for voltage drops.